Optimal 800MHz 4-Bit “Absolute-value Detector”
Final Project of EE113 (Digital Integrated Circuit Design) – Advisor: Prof. Xufeng Kou, ShanghaiTech University
This project is to design a 4-bit “Absolute-value Detector” with the minimum energy and worst-case delay of 1.25 ns. Here is the lab report:
bare_jrnl