Project #3 of EE577A (VLSI System Design) – Advisor: Prof. Pierluigi Nuzzo, University of Southern California This project is to simulate the performance of FinFET based devices like NAND, NOR gates with HSpice in Cadence Virtuoso. Here is the lab report:
Project #2 of EE577A (VLSI System Design) – Advisor: Prof. Pierluigi Nuzzo, University of Southern California This project is to design a 1024-bit SRAM in both schematics and layout level. And the design need to match the criteria of clock cycle as 2ns. Here is the lab report:
Final Project of EE582 (CMOS/Nano Neuromorphic Circuits) – Advisor: Prof. Alice Cline Parker, University of Southern California In this project, we have to build an electronic neuron or a small neural network that can recognizes a “+” in a 3×3 grid of input pixels. Only when the cross shape is given, the circuit will give a…
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Project #2,3 of EE582 (CMOS/Nano Neuromorphic Circuits) – Advisor: Prof. Alice Cline Parker, University of Southern California This project is to design the circuits that can simulate the performance of SOMA and synapse in neurons. For SOMA, when a continuous input voltage signal is provided, when its value is beyond the threshold voltage, a pulse will…
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Project #1 of EE582 (CMOS/Nano Neuromorphic Circuits) – Advisor: Prof. Alice Cline Parker, University of Southern California This project is to simulate the performance of spiking neuron model proposed by Izhikevich using MATLAB and analyze its relationship to each parameters in the model. Here is the lab report:
Final Project of EE504L (Solid State Processing and Integrated Circuit Laboratory Electrical Characterization of IC Devices) – Advisor: Prof. Kian Kaviani, University of Southern California This project starts from the semester all through till the end of the semester. In this semester, we get hand on experience in clean room and fabricated our personal silicon wafer. Here is the…
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Project #3 of EE479L (Analog and Non-Linear Integrated Circuit Design) – Advisor: Prof. Dina El-Damak, University of Southern California This project is to design a folded cascade op amp which fits the criteria including open loop gain, phase margin, supply rejection ratio etc. Here is the lab report:
Project #2 of EE479L (Analog and Non-Linear Integrated Circuit Design) – Advisor: Prof. Dina El-Damak, University of Southern California For most op amp, it will need a stable current source as a supply, this project is to design a 4-level supply independent current mirror, which will be used in the final project. Here is the…
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Project #1 of EE479L (Analog and Non-Linear Integrated Circuit Design) – Advisor: Prof. Dina El-Damak, University of Southern California This project is to design the amplifier with DC gain as 30dB. In this situation, the common source configuration is applied. Here is the lab report:
Final Project of EE477L (MOS VLSI Circuit Design) – Advisor: Prof. Ali E. Zadeh, University of Southern California This project is to design and optimize a digital phase lock loop. The whole project consisted of two parts: DPLL Individual Blocks: Design both schematics and layout of each block including Phase Frequency Detector, Charge Pump, Voltage Control…
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